Product category: Intellectual Property Cores
News Release from: Synopsys
Edited by the Electronicstalk Editorial Team on 15 February 2002
Libraries qualified for analysis
Artisan Components SAGE-X 0.18- and 0.13-micron family of standard cell libraries are now qualified and immediately available for Synopsys PrimeTime SI
With PrimeTime SI and Artisan's SAGE-X libraries in their nanometer design flow, customers are able to pinpoint crosstalk-induced timing problems quickly, thereby reducing the risk of potential chip failures. PrimeTime SI is a full-chip, static crosstalk analysis tool that detects and isolates signal integrity effects found in designs using 0.18-micron technology and below.
This article was originally published on Electronicstalk on 15 February 2002 at 8.00am (UK)
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PrimeTime SI extends the proven static timing techniques of the industry-leading PrimeTime tool to include crosstalk analysis, delivering a fully integrated solution that is easy to adopt.
To help the adoption, Artisan has enhanced its library characterisation tool around Synopsys characterisation guidelines to generate Liberty (.lib) libraries that are fully qualified for PrimeTime SI.
Artisan's SAGE-X standard cell libraries are optimised for density and speed and have an enhanced cell set designed to generate superior RTL-to-GDSII results through optimisation for state-of-the-art electronic design automation (EDA) tools and flows.
The libraries contain 535 cells and 130 functions and include a rich set of combinatorial and sequential functions; ultra high-performance, high-density arithmetic cells; register file support via high-density 'bit cells'; scan flip-flops for design-for-testability support; and integrated clock gating cells for power optimisation support.
To facilitate library qualification, Synopsys provided Artisan with a correlation kit consisting of a library screener and characterisation guidelines for PrimeTime SI.
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Working together, Synopsys and Artisan verified that the libraries - when tested with PrimeTime SI - met the characterisation guidelines and offered Spice-level accuracy.
"To avoid costly respins, customers moving to 0.13-micron design need to analyse their SoC designs for potential crosstalk-related timing failures", said Dhrumil Gandhi, senior vice president of product technology at Artisan Components.
"To address this need, we have enhanced our library modeling tools around Synopsys' characterisation guidelines, enabling us to generate Liberty (.lib) libraries that are fully qualified for PrimeTime SI.
As a result, our customers can adopt PrimeTime SI for static crosstalk analysis in their designs".
"Advanced library modeling for nanometer design continues to be a key focus of our Synopsys/Artisan alliance, as demonstrated by the qualification of Artisan Libraries for PrimeTime SI", said Antun Domic, senior vice president and general manager of Synopsys' Nanometer Analysis and Test Group.
"Synopsys and Artisan now offer easy access to high-quality libraries for PrimeTime SI, enabling our customers to perform fast, accurate gate-level crosstalk analysis on their system-on-chip designs".
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