Video platform packs in floating-point performance

A Sundance Multiprocessor Technology product story
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Edited by the Electronicstalk editorial team Oct 2, 2007

Digital Video Infrastructure Platform combines up to 11 fixed-point DSPs with up to seven Virtex-4 FPGAs, each running a floating-point FFT IP core.

The new Digital Video Infrastructure Platform (DVIP) from Sundance features up to 11 fixed-point DSPs, equating to as much as 50,000MIPS processing power.

Where that is still not sufficient floating-point calculation power for the most demanding real-life application, the DVIP gets a helping hand from closely coupled Xilinx Virtex-4 FX60 FPGAs.

The FC100 floating-point FFT IP-core implemented in the FPGA is designed using a radix-32 architecture to make it flexible, portable, and use as few external memory resources as possible.

Even then it's possible to reconfigure its complex data range from 256 points to 1Mpoint on-the-fly.

It is ideally suited to high-powered image processing, radar or video encoding/decoding systems.

A single IP-core will process 42 frames of a video 2D transform each second on single 1024x1024 images and that will take less than a half of the 128 XtremeDSP slices available on a Virtex-4 FX60.

The DVIP has three of these FPGAs as standard and up to four more FPGAs can be added.

The easiest way to visualise the power of combined fixed-point DSP and an FPGA enabled with the FC100 is a trip down memory lane, as Flemming Christensen, CTO of Sundance Multiprocessor Technology observes: "I can vividly remember when I was given an Intel 8087 math coprocessor in the early 1980s to increase the performance of my workstation PC".

"It was awesome".

"The 8087 could do 50,000FLOPS (floating point operations per second) whereas the DVIP can offer 50,000MFLOPS and still costs less than my old PC".

The FC100 is available in either VHDL source format or can be supplied as a task to integrate into the Xilinx System Generator for DSP or The MathWorks' Simulink tools.

It has been verified to the IEEE754 standard and comes with full simulation and implementation support.

A bit-true model for performance evaluation is provided free of charge for evaluation purpose.

"Sundance has done an exceptional job integrating high performance DSP functions with Xilinx FPGAs".

"By leveraging three high-performance Virtex-4 FX60 devices, the DVIP platform delivers impressive 2D transform performance", says Bruce Weyer, Senior Marketing Director of the Programmable Solutions Group at Xilinx.

"The development of the FFT IP-core as a coprocessor is the perfect technology match for demanding image processing solutions".

The DVIP is available now from a starting price of US $25,000 in single quantities with OEM prices on request.

The FC100 IP-core starts at US $10,000 for the basic version.

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