News Release from: RF Engines
Subject: HyperSpeed and HyperLength
Edited by the Electronicstalk Editorial Team on 11 March 2005
FFT cores offer low-risk signal processing
RF Engines has had two new contract successes for its recently released HyperSpeed and HyperLength fast Fourier transform (FFT) products.
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RF Engines has had two new contract successes for its recently released HyperSpeed and HyperLength fast Fourier transform (FFT) products. In the first of these, a major US defence prime contractor has used the vast processing power of a HyperSpeed FFT core in a new low cost, low power, digital receiver design. Due to the nature of the application, precise details cannot be released, however the FFT core is performing continuous real-time processing of data at speeds in excess of 1Gsample/s on a single Xilinx Virtex FPGA.
The core has been highly optimised and uses less than 1W in operation.
In the second contract, a UK Government department has used a HyperLength FFT core in a signal monitoring application.
The FFT core length has over 256,000 points, allowing the input spectrum to be split into very narrow frequency bins.
This very fine resolution, coupled with the real-time processing, allows detailed signal analysis to be conducted.
In this particular application, the core uses approximately 50% of the resources of a Virtex II 3000 FPGA and four 16Mbyte SDRAMs.
John Summers, VP Sales and Business Development at RF Engines, commented: 'These latest contracts are good examples of the demand for our extremely high performance cores, that also provide a low risk and cost-effective approach to signal processing design'.
'Our customers can be confident about the performance and the quality of the delivered product, since our standard business approach is to provide a precise bit-true model of the required design, and the delivered product is then warranted to exactly match that model'.
'Risk reduction and speed to market are definitely key factors with most of our customers'.
'We are progressing well with even higher performance designs to meet other customer requirements and to meet our goal of being able to see all of the spectrum all of the time'.
The HyperSpeed and HyperLength cores provide silicon efficient implementations of the FFT algorithm, which is used for spectral analysis, and are designed for single chip FPGA implementation.
The HyperSpeed architecture supports complex sample rates up to sample rates up to 3.2GHz and transforms lengths up to 32Kpoint.
The HyperLength architecture uses external memory and enables FFT transforms with up to 256Mpoint.
The FFT cores use fixed-point arithmetic, and have been developed using a highly parallel architecture.
Each core is factory configured to precise user specifications, ensuring maximum silicon efficiency and performance for each application.
The designs are supplied in a netlist form as a component ready to be combined with the customer's own IP or as part of an integrated design from RF Engines.
To complement this technology, the company also provides a range of signal processing building blocks for FPGA to build complete spectral analysis systems, including windowing functions, bit reversal, power calculation, averaging cores and half-band filters.
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