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Multithreading core aims to cut embedded costs

A MIPS Technologies product story
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Edited by the Electronicstalk editorial team Feb 7, 2006

The new MIPS32 34K family of cores is billed as a revolutionary multithreading solution for high-performance, cost-sensitive embedded applications.

The new MIPS32 34K family of cores is billed as a revolutionary multithreading solution for high-performance, cost-sensitive embedded applications.

The 34K core family is the first to implement the MIPS MT ASE and leverages the proven 24KE microarchitecture that includes the MIPS DSP ASE.

With its multithreading capabilities, the 34K cores significantly reduce overall SoC die area, cost, and power consumption.

Single-threaded microprocessors today waste many cycles while waiting to access memory, considerably limiting system performance.

The 34K cores are designed to mask the effect of memory latency by increasing processor utilisation.

As one thread stalls, additional threads are instantly fed into the pipeline and executed, resulting in a significant gain in application throughput.

Internal benchmarks indicate that the 34Kc core running two threads achieved a 60% speedup over a single-threaded processor with only a 14% increase in die size.

Additionally, the 34K core family delivers superior real-time responsiveness for embedded applications.

Users can allocate dedicated processing bandwidth to real-time tasks resulting in a guaranteed Quality of Service (QoS).

This mechanism constantly monitors the progress of threads and dynamically takes corrective actions to meet or exceed the real-time requirements.

"MIPS Technologies has taken a straightforward and sensible approach in implementing multithreading for embedded applications", said Jim Turley, Principal Analyst, Silicon Insider.

"It's a well thought-out strategy that should result in improved system efficiency and cost savings for MIPS Technologies' new and existing customers".

The 34K cores can run existing two-way SMP operating systems (OSes) and applications with minimal changes.

But it can also be used in environments where independent concurrent threads have very different roles ("AMP" or asymmetric multiprocessing).

Additionally, the 34K cores can be configured with a maximum of two VPEs (virtual processing element - a representation of the OS-only visible state of the MIPS32 architecture) and five TCs (thread contexts - a representation of the user-state of the MIPS32 architecture) for ultimate design flexibility.

This dual VPE capability allows the 34K cores to run two independent operating systems concurrently or alternatively a two-way SMP OS.

In addition, up to five TCs can be used to allow a single OS to run up to five processes concurrently.

"The decision to utilise a 34K core in our storage network processor design came after extensive internal benchmarking against a competitive multicore solution", said Jim O'Connor, Senior Vice-President of Engineering at iVivity.

"The realised saving in die size and power consumption, coupled with its compelling performance, made the 34K core stand out as the clear winner".

"Critical to the design of our second generation Eye-Q2 SoC was application performance, proven reliability and guaranteed real-time response", said Elchanan Rushinek, Vice President of Engineering at Mobileye.

"After evaluating competitive offerings, it was clear the value proposition of the 34K cores' multithreading capability was the superior solution".

"PMC-Sierra is recognised for our unique ability to innovate and integrate key technologies in leading-edge SoC solutions", said Dr Robert Yung, Vice President and Chief Technology Officer at PMC-Sierra.

"The 34K multithreading technology offers the superior performance and functionality we require for some of our next-generation products".

"SoC designers who are serious about tackling the insatiable demand for greater system performance while addressing the need to reduce system costs-especially in the consumer market-find the value proposition of the 34K core family very compelling", said Jack Browne, Vice President of Marketing at MIPS Technologies.

"We are delighted by the market's reception to the 34K cores thus far and anticipate continued rapid adoption".

Although the 24K and 24KE core families continue to be MIPS Technologies' flagship products for single-threaded applications, the new 34K core family is designed specifically for multithreaded workloads.

These could be single applications with available explicit threads such as multiple VoIP channels in home applications.

Alternatively, it could also be used to merge several single-threaded functions onto a single 34K core - for example, a host-processor running Linux and a DSP running an RTOS in an STB application.

The workload-concurrency in network routers and consumer devices such as digital TV and DVD recorders means that they, too, benefit from the 34K cores.

The extreme flexibility of the 34K cores enables them to run in an SMP-like configuration, which makes them an ideal choice for high-performance imaging devices such as multifunction printers and scanners.

Furthermore, the higher application throughput combined with the power-efficiency of the 34K cores make them especially suitable for low-power applications such as digital cameras, mobile handheld devices and portable media players.

With MIPS Technologies' existing third-party vendor relationships and the robust ecosystem that already supports the MIPS32 architecture, licensees of the 34K cores can quickly reap the benefits of multithreading.

Accelerated Technology now supports the 34K core family with the Nucleus RTOS and Eclipse-based Nucleus Edge IDE.

The Nucleus RTOS is robust, scalable and has a minimal memory footprint.

The Nucleus RTOS family of products consists of a complete line of networking, USB, graphics and file system libraries, providing embedded developers with everything they need to deploy a wide variety of embedded applications.

The Nucleus Edge IDE software gives developers an Eclipse-based development environment.

Both these products are seamlessly integrated to provide developers with a comprehensive solution to design and deploy their product to market quickly and easily.

Cadence Encounter Reference Methodology is available for customers of the 34K core family and provides a fast, predictable path to high-quality silicon.

Cadence Incisive emulation offers hardware/software coverification with Palladium, which integrates with FS2 probes and a variety of software debuggers.

CoWare's ConvergenSC provides a powerful, standards-based environment to develop, analyse, and optimise SystemC transaction-level platform models, speeding the concurrent design of SoCs with embedded software at the electronic system level (ESL).

Denali's Databahn cores provide DDR controller solutions for high-performance memory subsystems and facilitate chip interface design, integration and verification.

Coupled with the multithreaded capabilities of the 34K cores, their high-performance memory systems offer customers additional differentiation in performance, throughput and cost.

Express Logic's ThreadX is a small-footprint, highly efficient RTOS, now enhanced to support multithreading on the 34K cores.

First Silicon Solutions (FS2) supports a comprehensive suite of EJTAG debug and trace tools for the 34K cores.

The 34K PDtrace system, coupled with the System Navigator probe, provides best-in-class debug capabilities including support for hardware based multithreading, allowing customers to concurrently capture and view execution flow, load/store addresses, and the associated data.

FS2's tools are integrated with the GDB/Insight debugger found in the Gnu-based MIPS SDE tool chain, ensuring seamless operation, sophisticated features, ease of use, and minimal cost to the developer.

Green Hills Software offers a total software development solution that employs leading-edge compiler technology optimised for the 34K core family.

Magma's reference methodology, based on the Magma Blast Create RTL-to-placed gates, Blast Plan Pro hierarchical design and the Blast Fusion physical design solutions, enables the 34K core family to be easily integrated into SoC designs being implemented with Magma software.

Microsoft's next version of Windows CE will run on the 34K core family.

A board support package (BSP) will be available from the MIPS Technologies website.

MIPS Technologies' Software Toolkit combines the popular Free Software Foundation (FSF) Open Source Gnu tools with MIPS Technologies' proprietary runtime libraries that are pre-configured to many of its popular evaluationboards.

The MIPS software development environment (SDE) supports the latest features of the 34K core family.

The MIPS SDE Lite package is available for free download from the company's website.

OCP-IP, the industry association delivering OCP as the standard for IP core interfaces that facilitate "plug and play" SoC design, defines the high-performance, out-of-order, on-chip protocol that is employed in the native interface for all 34K cores.

Sonics provides a scalable intelligent interconnect architecture, boosting 34K-based system performance and enabling easy integration of other peripherals.

In addition, its Smart Interconnects allows users to customise their designs and reduce time to market.

Synopsys' optimised Galaxy Design Platform reference flow is available for customers of the 34K core family, helping them meet performance targets quickly.

TimeSys Corporation delivers subscription-based access to a MIPS32 Linux distribution through LinuxLink by TimeSys, a commercially supported Linux solution delivering the latest Linux features directly from MIPS Technologies.

LinuxLink incorporates an optimised open-source tool chain and enhanced Linux kernel for the 34K cores, in addition to continuously updated software components and tools.

Virage Logic Corporation's Area, Speed and Power (ASAP) Memory power efficient memory compilers, and ASAP Logic standard cell libraries are optimised for MIPS Technologies' 34K core family.

Virtio's VPMM-SC virtual platform for MIPS Malta development boards models the 34K core family for software development before hardware availability.

This Virtual Platform offers a choice of instruction-accurate and cycle-accurate CPU models.

VPMM-SC increases a software developer's productivity by allowing superior visibility and control into the hardware and software for efficient debug.

The 34K core family includes the 34Kc, 34Kf, 34Kc Pro and 34Kf Pro cores.

The 34Kf core adds hardware floating point support that is fully compliant with the IEEE754 specification.

34Kc Pro and 34Kf Pro Series cores feature the CorExtend capability which allows SoC designers to add proprietary instructions and tightly coupled hardware.

The 34K core family is generally available to customers now.

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