Seamless support for
synthesisable processor cores
The Mentor Graphics Seamless hardware/software coverification processor support package (PSP) is now available for the the MIPS32 24K family
The Mentor Graphics Seamless hardware/software coverification processor support package (PSP) is now available for the the MIPS32 24K family - dubbed the embedded industry's highest performance 32bit synthesisable processor cores. In SoC design, verification of the interface between hardware and software is critical to success and helps ensure fast time-to-market.
The Seamless coverification environment enables designers to create a virtual prototype of their 24K core-based system prior to physical hardware availability, thus reducing the risk of discovering hardware and software problems late in the design cycle.
By validating HW/SW interfaces and analysing the key design performance parameters, designers can shave months off the development process and ensure optimum system performance.
"We are committed to providing our best-in-class co-verification solution for the MIPS high-performance 24K processor family", said Serge Leef, General Manager of the Mentor Graphics SoC Verification Division.
"Our combined strengths enable our customers to manage the complexity of today's SoCs with greater reliability and time-to-profit efficiencies".
"Giving our customers the tools to bring their MIPS-based designs to market with speed, ease and efficiency is of utmost importance", said Jack Browne, Vice President of Worldwide Sales at MIPS Technologies.
"We have a long-standing relationship with Mentor Graphics, a leader in hardware/software coverification, and are delighted to count them as a key partner in the vibrant ecosystem of companies providing best-in-class development tools that support the MIPS architecture".
In addition to the 24K family, the Seamless PSPs support the MIPS32 4K, 4KE and 4KS and MIPS64 5K processor families, and 20Kc and 25Kf cores.
Mentor Graphics also offers the Seamless PSPs for MIPS-Based processors developed by MIPS licensees such as LSI Logic, PMC-Sierra and Toshiba.
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