HyperTransport core powers high-speed data
A new HyperTransport physical interface (PHY) core from LSI Logic offers an aggregate bandwidth of 12.8Gbyte/s
The LSI Logic Hypertransport PHY core is immediately available for ASIC customers as part of the company's Gflx 0.11-micron process technology CoreWare library and is ideal for use with LSI Logic's innovative RapidChip platform ASIC products. HyperTransport interconnect technology is a popular high-speed, high-performance, point-to-point link for integrated circuits, developed to enable the chips inside high-performance communications, storage and networking devices to communicate with each other faster than with existing technologies.
LSI Logic is a contributor member of the HyperTransport Consortium, providing expertise in influencing next generation specifications.
"The LSI Logic HyperTranport PHY core adds a new high performance interface to our extensive CoreWare IP portfolio and enables us to maintain leadership in rapidly providing new I/O interfaces to our customers", said Tom Sandoval, Vice President, Communications and ASIC Marketing, LSI Logic Corp.
"This is a robust solution that addresses the bandwidth and scalability requirements for new generations of high-performance devices".
The LSI Logic HyperTransport PHY core is compliant with the HyperTransport Technology PHY Interface Specification (Version 1.01) and the HyperTransport I/O Link Protocol Specification (Version 1.03).
LSI Logic has performed interoperability testing with GDA Technologies' popular HyperTransport IP designed to help enable HyperTransport adopters to launch HyperTransport technology-based products in a timely manner.
"GDA's proven high quality HyperTransport IP for cave, tunnel, host and bridge implementations combined with LSI Logic's HyperTransport PHY core provides customers with a preverified IP solution that will help shorten time-to-market and cut the cost of product development", said Prakash Bare, Vice President of IP Business at GDA Technologies.
"We are pleased to be partnering with LSI Logic to speed the development of highly integrated HyperTransport solutions".
Key features of LSI Logic HyperTransport PHY core include: a datarate scalable from 400Mbit/s to 1.6Gbit/s; support for 2/4/8/16/32bit links in each direction; a single PLL supports up to 32 channels; high-speed HyperTransport LVDS I/Os; and options of wire-bond and flip chip packages.
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