IP core offers speed boosts
The multi-threaded architecture allows the overlapped execution of multiple threads, enabling multiple applications to run concurrently on the same processor.
Imagination Technologies has released the Meta HTP multi-threaded processor IP core, extending support for operating systems (OS) and applications while providing faster speeds and new architectural enhancements The multi-threaded architecture allows the overlapped execution of multiple threads, enabling multiple time-critical, DSP-rich applications and general-purpose tasks to run concurrently on the same processor, reducing power consumption and silicon area whilst increasing throughput beyond that of traditional processors so that one Meta HTP can replace multiple high-performance RISC and DSP cores
Meta HTP implements a longer pipeline, enabling it to achieve higher clock speeds ranging from 360MHz in 130nm to 500MHz in 90nm and up to 700MHz in 65nm process using standard cells together with high-speed SRAM macros for cache.
A longer pipeline would normally reduce benchmark performance per MHzb however Meta HTP includes additional architectural features to compensate including a return address cache and branch prediction table support.
A four-threaded Meta HTP delivers up to 1552 DMIPS in a 65nm process.