Express IP has all options covered
Flexible and configurable PCI Express controller IP can be used for end-point, root complex, switch and bridge implementations
The GPEX-2 PCI Express Gen 2 controller IP available now from GDA Technologies is ideally suited for desktop, server, mobile, networking and telecomms applications. GPEX-2 IP is a flexible and configurable design targeted for end-point, root complex, switch and bridge implementation. The controller's architecture is carefully crafted for optimal link utilisation, latency, reliability, power consumption, and footprint.
'GDA's has been in the forefront of providing the most flexible IP solution to its customers for over 5 years', says Ravi Thummarukudy, VP and General Manager of IC and IP Division at GDA.
'GDA's exhaustive verification methodology and interoperability testing with leading PHY IP minimises risk and reduces time to market for our customers who are designing high-performance Gen 2-based products'.
GPEX-2 is part of the GDA's PCI Express (GPEX) family of PCI Express IP solutions which has been in production for over 3 years.
The IP has the distinction of having maximum number of entries in the PCI Express integrators list, demonstrating compliance with PCISIG testing and universal interoperability with Industry standard PCI Express solutions.
The new PCI Express Gen 2 version is compatible with the earlier version of the GPEX IP which will allow smooth transition of existing designs.
GDA also offers customisation and integration design services for all the IP.
The GPEX-2 flexible backend architecture allows for easy integration into a wide range of applications.
The IP is feature-rich, highly flexible, scalable and configurable and has a timing-friendly design.
It supports a wide range of data widths (32, 64,128bit) and configurable lanes (x1, x2, x4, x8 and x16), and is independent of application logic, PHY designs, implementation tools and target technology.
The IP is an exhaustively verified solution which has been fully tested against a design-specific and protocol compliance checklist.
The comprehensive directed and random tests ensure a very high coverage.
The IP is verified with leading PCI Express verification IP's and the verification environment can be configured to run with all the major simulators.
The reusable block level verification environment and the formal verification methodology enhance the quality of verification process and add more confidence to the design verification.
? GDA Technologies: contact details and other news
? Email this article to a colleague
? Register for the free Electronicstalk email newsletter
? Electronicstalk Home Page