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Front-end tool allows designers to perform power tradeoff and optimisation at the RTL level.
Faraday Technology has further enhanced its PowerSmart ultra-low-power ASIC design flow to include a front-end tool that allows designers to perform power tradeoff and optimisation at the RTL level Sequence Design, a leader in providing advanced power-aware design tools, will be the supply partner of this tool
This article was originally published on Electronicstalk on 2 Feb 2007 at 8.00am (UK)
Faraday expands commitment to ARM-based CPUs
Faraday Technology has licensed the ARM926EJ-S microprocessor and the ARMv5TEJ instruction set for its next-generation FA CPU family for embedded, networking and multimedia applications.