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Product category: Intellectual Property Cores
News Release from: Denali Software | Subject: BCH ECC
Edited by the Electronicstalk Editorial Team on 18 July 2007

Memory controller IP cuts Flash system
costs

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Next-generation high-speed BCH error correction code technology for NAND Flash memory claims order-of-magnitude performance improvement at lower costs.

Denali Software has unveiled its next-generation high-speed BCH error correction code (ECC) technology for NAND Flash memory, which delivers a significant order-of-magnitude performance improvement, while reducing silicon overhead and bill of materials (BoM) cost associated with NAND memory subsystems The new technology, as part of Databahn memory controller IP product, is used by hardware engineers in deploying robust NAND Flash-based systems