Specification aims to
improve DDR memory designs
Denali Software has announced the release of the DFI specification version 1.0, on behalf of all DDR PHY Interface (DFI) specification participating members
The DFI specification won the prestigious DesignVision Award this week at DesignCon in San Jose, California. Participating members of the DFI specification include representatives from industry-leading companies ARM, Denali, Intel, Samsung and Synopsys. The DFI specification speeds DDR memory system deployment, and reduces the significant integration and verification costs by systems developers, memory controller vendors, and PHY providers.
'I am happy that the efforts and focus of the DFI working group has been recognised by the International Engineering Consortium', said Bryan Jones, IP Outsourcing Programme Manager, Mobility Group LTG/DAC for Intel Corporation.
'Integrating and verifying memory controller logic and PHY designs signify a substantial cost to all parties involved'.
'From a systems perspective, this DFI specification 1.0 represents a momentum towards creating and sustaining more reusable IP in this space'.
The coveted DesignVision Award, in the Interconnect Technologies and Components category, was awarded by John Janowiak, the President of the International Engineering Consortium was accepted, on behalf of the DFI participants, by Bryan Jones, of Intel and Brian Gardner, Vice President of IP products at Denali.
The DFI specification 1.0 describes a common interface between DDR-DRAM memory controller logic designs and DDR DRAM physical interface (DDR PHY) designs in order to reduce cost, time to market, and increase the potential for reuse of the individual components that make up the memory system.
'We are very pleased that our technical achievements have been highlighted in this way', said Brian Gardner, Vice President of IP Products at Denali.
'These companies represent the best minds in the field, and their participation in this industry initiative will enable better DDR solutions'.
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