University leads in design verification training
Dr Kerstin Eder has been invited to present her work at the Cadence Academic Network Symposium during CDNLive, the Cadence annual user conference
Cadence has selected the University of Bristol to head the Cadence Academic Network in Europe.
Dr Kerstin Eder, Senior Lecturer in the Department of Computer Science at Bristol University, has been invited to present her work in setting up design verification within a computer science undergraduate degree programme at the Cadence Academic Network Symposium during CDNLive, the Cadence annual user conference, taking place in Munich, Germany from 28th to 30th April.
Dr Eder introduced the subject of design verification into the computer science curriculum in 2002.
This made Bristol University the first and, so far, only university in the UK to train computer science undergraduates in the skills expected from professional verification engineers.
Design verification is the process used to demonstrate the functional correctness of a design prior to manufacture.
Dr Eder teaches simulation-based verification techniques, coverage-driven verification methods, constrained pseudo-random test generation, advanced coverage measurement, assertion-based verification and the latest formal verification techniques.
"I really appreciate Cadence's focus on methodology".
"The comprehensive examples in the SOC Verification Kit will be an excellent basis to investigate and communicate the multiple aspects of verification methodology".
"The practical experience our students gain in the labs with Cadence's cutting-edge verification tools are invaluable for their learning and a great asset when they join the work force", said Dr Eder.
"It is an honour for us and also a responsibility, to take the lead in the advanced verification area".
Design verification is a new career path that complements traditional IC Design.
The increasing amount of high-level code used for design verification demands good programming and software engineering skills.
This is why design verification is offered to computer science and computer systems engineering students at Bristol.
Not what you're looking for? Search the site.
- Middleware makes more of IPTV services
- Sysgo - latest company news
- Vivante - latest company news
- Green Hills updates platform for secure wireless
- RF Engines adds weight to EE Times survey
Request your free weekly copy of the Electronicstalk email newsletter ...
Browse by category
- Active components (13648)
- Passive components (3620)
- Design and development (10266)
- Enclosures and panel products (4014)
- Interconnection (3685)
- Electronics manufacturing, packaging (3491)
- Industry news (2106)
- Optoelectronics (1973)
- Power supplies (3046)
- Subassemblies (5663)
- Test and measurement (5825)