H.246 benchmarks validate video performance
Benchmark results validate the low system clock rate and low energy consumption of the ARC Video Subsystem when decoding standard definition H.264 video
ARC International and Berkeley Design Technology have announced the industry's first certified H.264 decoder performance benchmark results for the ARC Video Subsystem. These results validate the low system clock rate and low energy consumption of the ARC Video Subsystem when decoding standard definition H.264 video.
This low power is a benefit of ARC's configurable architecture that enables the creation of highly efficient subsystems and processors.
The ARC Video Subsystem requires as little as 160MHz, with low power consumption and small die sise, to decode a 1.5Mbit/s BDTI video stream at 30 frames per second for the H.264 Baseline Profile decoder at D1 resolution.
No special modifications were made to the standard ARC Video Subsystem to achieve these results.
BDTI uses a proprietary video test clip, which consists of several types of scenes commonly used to evaluate video codec performance.
In an article in its InsideDSP.com newsletter, BDTI stated: 'ARC helped BDTI create a methodology which is both fair and responsive to the needs of video system and SoC developers, including a rigorous and independent certification process'.
According to BDTI's analysts: 'BDTI's findings confirm ARC's claim that the ARC Video Subsystem can perform H.264 decoding at 160MHz, with a die area of 9.1mm2 and an average power consumption of 116mW (3.9J of energy per frame) in a 0.13um process'.
'By being the first to obtain BDTI Solution Certification for its H.264 decoder solution, ARC has taken a leadership role in bringing better information to the video solution marketplace, and has demonstrated its confidence in the ARC Video Subsystem'.
Derek Meyer, ARC's Senior Vice President of Sales and Marketing, said: 'ARC partnered with BDTI because they are the industry's most respected independent authority for signal processing benchmarks'.
'By following their rigorous and independent certification process, we now are able to provide customers with BDTI verified data that clearly shows the efficiency of the ARC Video Subsystem for H.264 decoding'.
'This not only supports our leadership position, but will help our customers make more informed decisions for SoCs targeting video-intensive applications'.
ARC Video is a configurable subsystem that offers a powerful, highly efficient solution for low power multimedia applications.
It incorporates must-have video and imaging codecs in a pre-verified, programmable environment.
The ARC Video Subsystem processes H.264, VC-1, MPEG-4, MPEG-2 decoders and industry standard imaging codecs at less than 40mW (90nm TSMC G) for standard definition resolutions.
The ARC Video Subsystem includes a configurable ARC 700 family core that is coupled with the company's award winning single instruction multiple data (SIMD) accelerator, which was specifically designed for video and audio processing.
A media-centric DMA engine incorporated in the ARC Video Subsystem is highly tuned to efficiently handle multimedia packet transfers.
A full set of hardware and software development tools is included with each ARC Video Subsystem licence.
All ARC Media Subsystems are configurable, enabling SoC designers to add or remove instructions to better differentiate from their competition.
By leveraging the programmable nature of ARC's subsystems, additional algorithms can be included beyond the optimised and preverified codecs supplied as part of the subsystem.
Because the ARC Video Subsystem is based on a configurable ARC 700 family core, it can run at up to 533MHz in a 0.13um process.
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