System components accelerate SoC throughput
Three new products support ARM11 family-class processors that use the Amba AXI interface specification
These new AXI System Components consist of the L220 AXI Level-2 cache controller, the PL300 AXI configurable interconnect and the PL340 AXI SDRAM controller, ideal for implementations in consumer and wireless devices, among others. These components are offered as PrimeCell peripherals, part of the ARM library of re-usable soft IP macrocells, which enable the rapid assembly of SoC designs.
Together, the ARM AXI System Components form an optimised, flexible link from the processor to external memory and underscore ARM's commitment to providing an ecosystem of system IP and EDA tool vendor support for all ARM processors.
Together, these preverified, configurable AXI System Components will enable designers to quickly develop a highly integrated, complete AXI backplane for ARM11 family-class processor-based SoCs.
The AXI System Components provide a data-efficient, highly optimised link from the processor, through the cache and memory controllers, to external memory.
This maximises the performance of ARM11 family-class processors even when used with low cost, slow external memory.
As CPU to off-chip memory communication is becoming a major performance bottleneck, design engineers will recognise this as a valuable development.
"In general, the features of AXI technology, such as data bursting, provide a big performance benefit to more advanced, ARM core-based embedded systems".
"With the addition of these AXI System Components, especially the Level-2 cache controller, designers will realise another huge boost in performance for ARM11 family-based processors", said Markus Levy, President, EEMBC.
"Using an MPEG4 decode benchmark, similar to the one recently released by EEMBC, ARM was able to demonstrate a 74% performance improvement using only a 128Kbyte Level-2 cache".
"Ongoing consumer demand for increased performance in such applications as mobile multimedia and digital TV has led to more complex systems and the need for dramatic in-system performance gains", said John Cornish, Director of Product Marketing, ARM.
"We have solved this issue with the AXI System Components, which unleash the full benefits of high-frequency processors by optimising memory system performance".
The L220 PrimeCell AXI Level-2 cache controller typically increases system performance by between 50 and more than 100%, by storing recently used data in high-speed on-chip memory.
It reduces overall system power consumption by reducing the number of power-hungry external memory accesses, and can enable the use of a less costly memory system.
The PL300 PrimeCell AXI configurable interconnect provides a multilayer topology that guarantees the necessary bandwidth and low latency for all connected IP blocks.
The interconnect has a throughput of 1.6Gbyte/s per master at 200MHz and no limitation on the number of masters used.
It comes with an XML machine-readable specification that enables easy integration into SPIRIT-standard-based EDA tools and drives the configuration of the AXI configurable interconnect to the specific requirements of the AXI backplane.
It supports a wide range of memory types including mobile-DDR, DDR, mobile SDR and SDR memories.
With its configurable architecture, it is possible to select the optimum balance of cost, size and performance to meet system requirements.
The three new products, the L220 AXI Level-2 cache controller, the PL300 AXI configurable interconnect, and the PL340 AXI SDRAM controller, offer additional benefits to consumers, OEMs and ARM silicon partners.
For example, through support of the amba AXI interface standard, consumers will not only benefit from longer battery life due to support for the ARM Intelligent Energy Manager (IEM) technology, but also from higher data throughput, which enables software to run faster on end-user equipment.
OEMs will reduce costs due to the ability to use less costly off-chip memories.
Semiconductor manufacturers will have lower costs through a royalty-free business model for the AXI System Components and fast and reliable design-in.
This is achieved through compatibility with the SPIRIT approach and the availability of EDA tools that support SPIRIT.
As well as supporting the ARM1156T2-S processor and the ARM1176JZ-S processor, the AXI System Components support the full performance demands that the new ARM MPCore multiprocessor can place on a memory subsystem.
Using the L220 cache controller reduces external memory bandwidth requirements such that a low-cost memory system can be used, such as 32bit DDR SDRAM while maintaining high system performance.
All three of the AXI System Components also support the SPIRIT's XML machine readable specification for easy integration, and for use with tools such as Mentor's Platform Express and Synopsys' CoreAssembler.
The Amba 3.0 AXI specification was developed, with technical contribution and review by over 30 participating companies, to address performance issues by providing a high-performance, high-bandwidth interconnect while simplifying design at high frequency.
It also provides support for related ARM technologies, such as IEM for voltage and frequency scaling and Trustzone secure technology for such system security applications such as digital rights management.
The AXI System Components are available for licensing on a royalty-free basis.
The Amba AXI interface specification is also royalty-free and can be downloaded by anyone from the ARM website.
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