Blackfin BF51x processors reduce power consumption
Analog Devices has unveiled the Blackfin BF51x series of convergent processors.
The new Blackfin processors are the BF512, BF514, BF516 and BF518.
All are single-core convergent processors that surpass outdated, heterogenous MCU+DSP approaches in reducing part-count, system cost, board space, and power consumption.
The BF51x processors feature high clock rates and low power dissipation per unit of processing (MMACs/mW), and are OS and compiler-friendly.
The 16/32-bit BF51x processors are available at clock speeds up to 400 MHz (800 MMACS) and include 116 Kbytes of RAM plus an optional 4Mbits of serial (SPI) flash memory.
Each also integrates Lockbox security for code and content protection.
Owing to the needs of low power, rich media applications where Blackfin processors are best suited, on-chip integration assures easy connection to a variety of audio, video, imaging and communications peripherals and memory types.
Integrated features include support for 16 stereo I2S digital-audio channels, 12 peripheral DMA channels, and an advanced memory controller for glueless connection to multiple banks of external SDRAM, SRAM, Flash, or ROM.
Each processor includes two dual-channel synchronous serial communication ports (SPORTs), a high-speed parallel peripheral interface (PPI), an I2C compatible two-wire interface (TWI), dual PC-compatible UARTs, and two SPI-compatible serial peripheral interface ports.
The Blackfin processors deliver 8.5 MMACs/mW (100 MHz) and include dynamic power management (DPM) functionality that lets developers match the processor's power consumption to processing requirements during program execution.
To maximise energy efficiency, while providing the highest levels of performance at low power, Blackfin processors use a range of design techniques including programmable voltage and frequency scaling, clock-cycle resolution dynamic clock gating, multiple power domains that support deep-sleep and hibernate modes, high code density to minimise bus-activation energy, mixed threshold-voltage transistor utilisation for optimal performance and power efficiency, a full-custom processor core for maximum energy efficiency, judicious use of hardware accelerators, and support for mSDRAM to minimise board-level power consumption.
The BF512 is the new low-cost entry point in the Blackfin processor family.
The device balances performance, peripheral integration, and price, and is well suited for the most cost-sensitive applications including portable test equipment, embedded modems, biometrics, and consumer audio.
All members of the BF51x family also include a new three-phase PWM generation unit for inductive motor control applications and a quadrature interface for rotary encoders.
The BF514, BF516, and BF518 extend the convergent processor family further into the portable application space with on-chip removable-storage interfaces.
All three devices include Secure Digital Input Output (SDIO) for connectivity to standard flash memory and Wi-Fi cards; a power-optimised CE-ATA storage interface for small form-factor handheld and consumer electronics applications; and an embedded multimedia card (eMMC) interface for integrating mass-storage flash memory in a range of consumer electronics, wireless, navigation, and industrial applications.
For developers of network-connected industrial and instrumentation applications, the BF516 adds an Ethernet 10/100 MAC with Media Independent Interface (MII) and Reduced Media Independent Interface (RMII).
Highly integrated for industrial, portable and VoIP applications, the BF518 Ethernet MAC supports the IEEE-1588 clock synchronisation protocol for networked measurement and control systems.
A wide variety of applications are viewing the contemporary convergent-processor approach as the soundest choice for cost- and power-sensitive designs.
For example, some voice-over-IP (VoIP) telephony system developers have designed in separate DSP and microcontroller chips to implement the required media and control functionality.
With BF51x Blackfin processors, however, a single architecture enables full VoIP telephony functionality in a unified software development environment with faster system debugging and deployment, lower overall system cost, and the lowest possible system power demand.
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