Serdes core runs up to 8Gbit/s
Agilent Technologies has developed the industry's first 8Gbit/s multirate embedded serdes core for storage networking OEMs.
Agilent Technologies has developed the industry's first 8Gbit/s multirate embedded serdes core for storage networking OEMs The new serdes core was validated in a 90nm CMOS process and it supports 8, 4 and 2Gbit/s data-transfer rates
Thanks to the core's superior noise immunity, modular design and low power consumption, storage OEMs are now able to embed as many serdes as needed onto a single ASIC chip.
In tests conducted at Agilent, the embedded serdes ASIC achieved error-free transmission driving signals over FR4 material (at room temperature) a distance of 400mm.
The serdes core offers: decision feedback equalisation (DFE); automatic receiver DFE tuning; BERT on chip for channel bit error rate optimisation; signal eye diagram support built in; LC-based oscillator for improved power-supply noise rejection; 1149.6 AC-Extest for testing AC-coupled connections between ICs on the PCB; and internal 100ohm differential termination.
Agilent's embedded serdes ASIC development model provides support throughout the entire product life cycle.
It incorporates testing capabilities as early as the definition of system-level architecture and accounts for in-circuit manufacturing test, functional test, system turn-on and debug, and field diagnostics.
With this model, Agilent enables equipment manufacturers to develop high-bandwidth networking and storage systems with superior reliability and reduced size, complexity and cost. Request a free brochure from Avago Technologies ...
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