Product category: Intellectual Property Cores
News Release from: Avago Technologies | Subject: Serdes IP
Edited by the Electronicstalk Editorial Team on 28 June 2004
Milestone for embedded serdes IP
Agilent Technologies has shipped its 10 millionth embedded serdes channel as part of its ASIC offerings for storage, enterprise computing and network equipment manufacturers.
Agilent Technologies has shipped its 10 millionth embedded serdes channel as part of its ASIC offerings for storage, enterprise computing and network equipment manufacturers Agilent's embedded serdes intellectual property (IP) core offers low power consumption and extremely low jitter, enabling Agilent to integrate more than 200 serdes channels onto a single 0.13-micron CMOS chip, each operating at up to 3.125Gbit/s
This article was originally published on Electronicstalk on 25 Dec 2002 at 8.00am (UK)
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This high level of integration is significantly higher than the industry's previous maximum of 150-plus on-chip serdes channels.
OEMs are now able to develop high bandwidth networking and storage systems with superior reliability and reduced size, complexity and cost.
"It's gratifying to see our embedded serdes technology leadership extend to volume leadership as our customers ramp production of their new products", said James Stewart, Vice President and General Manager of Agilent's ASIC Products Division.
"This technology capability, as well as pioneering work in embedded test and solid methodology for high-speed characterisation, has made Agilent a clear leader in embedded serdes ASICs".
Agilent's ASIC capability is based on a heritage of high transistor ASIC designs with extremely high serdes channel count.
Previously, Agilent integrated more than fifty 2.5Gbit/s transmit and receive channels on a single CMOS chip and subsequently produced an ASIC with 36 multirate serdes channels operating at up to 3.125Gbit/s. Request a free brochure from Avago Technologies ...
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