Efficient signal filtering,
detection and analysis
CoreFIR is an finite impulse response (FIR) intellectual property (IP) core generator optimised for use with Actel's Flash- and antifuse-based families of field-programmable gate arrays (FPGAs)
Actel today introduced CoreFIR, a finite impulse response (FIR) intellectual property (IP) core generator optimised for use with Actel's Flash- and antifuse-based families of field-programmable gate arrays (FPGAs). Specifically designed for lower sampling rates, CoreFIR can be implemented in the smallest Actel FPGA devices and provides a level of flexibility and cost-effectiveness that is more attractive than standard processor or application-specific integrated circuit (ASIC) alternatives.
CoreFIR, the latest addition to Actel's DirectCore portfolio, is an easy-to-use filter generator that uses a distributed arithmetic implementation methodology to create FPGA-based low- and high-pass digital filters for a variety of general signal filtering, detection and analysis functions.
CoreFIR generates filters to detect and analyse signals for applications such as radar, sonar, ultrasound and others in the communication, space, medical, industrial and military markets.
"With programmable logic becoming an attractive alternative to standard DSP processors, CoreFIR offers designers an easy and cost-effective way to implement DSP functionality, said Yankin Tanurhan, Senior Director of Applications and IP Solutions at Actel.
"Using the high-performance, highly efficient and easy-to-use core generator, designers can implement digital filters that are customised for their application and reduce development time from weeks to days.
CoreFIR, optimised for Actel's Axcelerator, RTAX-S, SX-A and ProASIC Plus FPGAs, can create FIR filters that operate at more than 160 MHz when implemented on Actel's high-performance, antifuse-based Axcelerator devices.
Unlike standard DSP solutions, CoreFIR is designed to be small and highly customisable.
Using the core generator, designers can input the number of taps, bit width and coefficient bit width, and the ratio between system clock frequency and data sampling rate for a variety of configurations, including signed or unsigned inputs, fixed or variable coefficients, and embedded RAM.
In addition, the core generator outputs RTL code and a testbench, enabling the designer to verify the specified design configuration.
CoreFIR has also been thoroughly verified in simulation by Actel.
Actel's new CoreFIR generator is available now.
A free evaluation version is available for download via Actel's website. Request a free brochure from Actel Europe....
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