FPGA core cuts costs for avionics designers

An Actel Europe product story
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Edited by the Electronicstalk editorial team Oct 8, 2004

The Core429 is a bus interface core that implements the ARINC429 communications standard and is optimised for use with Actel's nonvolatile FPGAs.

Underscoring its longstanding position as a leading supplier of field-programmable gate arrays (FPGAs) to the aerospace industry, Actel has released a new intellectual property (IP) core designed to reduce development time and improve the performance of aircraft communications systems.

The new Actel Core429 is a bus interface core that implements the ARINC429 communications standard and is optimised for use with Actel's nonvolatile FPGAs, including its ProASIC Plus and Axcelerator devices.

Core429 is a highly flexible solution that eases system design and offers several unique features including full channel configurability as well as programmable FIFO depth and interrupt capability.

Additionally, when combined with Actel's nonvolatile FPGAs, Core429 is the world's only firm-error immune, programmable ARINC429 solution.

"ARINC429 is one of the most popular communications bus standards used in commercial aircraft today and the new Core429 IP solidifies Actel's reputation as a technology innovator and FPGA supplier of choice to the aeronautics industry", said Yankin Tanurhan, Senior Director of Applications and IP Solutions at Actel.

"Core429 enables a fully compliant ARINC receiver and transmitter in an industrial-temperature, reprogrammable, nonvolatile FPGA for less than $20, providing significant cost savings in addition to enabling system-level integration".

"For legacy applications, our Core429 has the option to be code compatible with existing ARINC429 ASSPs and can interface to standard ARINC line drivers and receivers, making it suitable for new or replacement applications".

Unlike existing processor-based ARINC429 devices that have a fixed number of transmit and receive channels, Actel's Core429 enables a configurable number of channels (up to 16 transmit and receive), that can all use on-chip memory, which can lead to significant cost reduction.

Customers gain further flexibility with an integrated FIFO that is programmable up to a depth of 512 ARINC429 words.

The programmable depth and interrupt capability of the FIFO improves system performance by reducing the workload on the host processor.

In addition, because of its state-machine design that is optimised for ARINC429 applications, Core429 uses less power and is much easier to program compared to processor-based products.

When used with an Actel Flash-based or antifuse-based FPGA, Core429 is the industry's only firm-error immune ARINC429 solution, leading to significant improvements in system reliability.

Firm errors are neutron-induced configuration upsets that result in logic errors and can cause the functional failure of an FPGA device.

SRAM-based FPGAs are particularly vulnerable to firm error failures, especially in high-altitude environments.

Because the effects of firm errors on an aircraft's ARINC429 system can be devastating, even resulting in loss of communication, it is important that these systems be as protected as possible.

By incorporating Flash and antifuse technology, Actel's FPGAs are immune to the configuration upsets caused by firm errors, making them more appropriate for high-reliability applications.

To help simplify design integration and verification of Core429 systems, Actel offers a development kit that demonstrates operation of four ARINC429 channels.

The Core429-Dev-Kit includes a reprogrammable Actel ProASIC Plus FPGA as well as a daughter card with standard line drivers and receivers to interface with the 429 bus.

The development system is programmed with one Core429 configured with four transmit and four receive channels as well as Actel's Core8051 as a host processor.

The development kit is also prefitted with connections for Ethernet, RS232, USB and IrDA communications.

Actel's Core429 is available in evaluation, netlist and RTL versions.

The evaluation version, a ModelSim compiled simulation model, is available for free.

The netlist version simplifies system integration while the RTL version allows full user customisation.

Pricing starts at $5000.

Netlist and RTL versions are delivered with testbenches and all versions of Core429 are well documented to ease the integration task.

The Core429-Dev-Kit is priced at $1800 and includes the Libero Platinum evaluation software, FS2 debugger software for 8051 code debugging, a daughtercard, programming files, documentation, appropriate cables and a power supply.

Owners of Actel's Platform8051 development kit can purchase the Core429 daughtercard (Core429-SA) for $1250.

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