Intellectual Property Cores
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Latest articles from 'Intellectual Property Cores'
News releases from this sub-category
Showing 301-325 of 1567 articles
The c.LINK co-ax network chip technology allows consumers to easily share high-definition content such as video, music, games and images throughout the digital home.
News from MIPS Technologies, Apr 24, 2007
A fabless IC design house focusing on DTV and communication fields, has chosen Faraday's miniLib cell library to develop digital TV ICs.
News from Faraday Technology, Apr 23, 2007
Bitmicro licenses MoSys SRAM technology
Nonvolatile memory specialist licenses 1T-SRAM embedded memory macro technology from a supplier of solid-state intellectual property.
News from MoSys, Apr 23, 2007
Fujitsu Microelectronics Europe has been working with London-based Toric to verify embedded jitter-suppressing macros based on Anti-Jitter Cell technology.
News from Fujitsu Microelectronics Europe, Apr 23, 2007
HyperSpeed high-performance FFT cores can be built to optimally process complex data streams with sample rates up to several gigasamples per second.
News from RF Engines, Apr 23, 2007
Rambus has signed up TES Electronic Solutions to support its intellectual property portfolio via its worldwide network of design centres.
News from Rambus, Apr 19, 2007
National Semiconductor is working with Cavendish Kinetics to qualify its Nanomech embedded nonvolatile memory technology for National's key analogue and mixed signal processes.
News from Cavendish Kinetics, Apr 19, 2007
Lossless compression core based on the JPEG-LS standard offers a compact physical size and high processing rate - up to 161Msample/s on an FPGA.
News from Cast, Apr 18, 2007
Security software gains NIST validation
Cryptographic and user authentication software passes the Cryptographic Algorithm Validation Suite defined by the National Institute of Standards and Technology.
News from Elliptic, Apr 18, 2007
NEC Electronics has now licensed MIPS Technologies' 64-bit architecture for use in the company's digital consumer ASSPs and VR series line of products.
News from MIPS Technologies, Apr 17, 2007
IP automates functional verification of configuration registers for system-on-chip designs.
News from Denali Software, Apr 17, 2007
32bit core set for mixed-signal integration
e2v has selected the APS3 IP core for upcoming mixed-signal sensor and imaging system products.
News from Cast, Apr 17, 2007
Verification IP chosen for the next generation
JMicron Technology has chosen the PCI Express Gen2 nVS from nSys Design Systems to accelerate its next generation designs.
News from nSys Design Systems, Apr 13, 2007
Instrumentation IP is specifically focused on the debugging of embedded systems.
News from Temento Systems, Apr 13, 2007
The Leon3 processor from Gaisler Research now supports Express Logic's ThreadX RTOS.
News from Gaisler Research, Apr 13, 2007
EtherWaves has joined the World DMB Forum, an international group of 130 organisations that focuses on developing Digital Multimedia Broadcasting technology.
News from EtherWaves, Apr 12, 2007
Symposium to explain use of embedded nonvolatile memory use in SoC applications.
News from Kilopass Technology, Apr 12, 2007
Grant to develop active layer technology
A US $340,500 grant will fund an initiative focusing on the continued development of Plexcore PV active layer technology for organic solar cells.
News from Plextronics, Apr 11, 2007
John C Lindgren has succeeded George Cwynar as the President and Chief Executive Officer of company specialising in semiconductor IP licensing
News from Mosaid, Apr 11, 2007
MoSys has named Takashi Murayama (56) as Vice President and Country Manager, Japan.
News from MoSys, Apr 10, 2007
Core chosen for broadband wireless SoCs
French company Comsis will use the Leon3 processor and GRLIB IP library in new MIMO solutions for broadband wireless networks.
News from Gaisler Research, Apr 10, 2007
Data-compression startup gets VC funding
A real-time data-compression intellectual-property provider, has secured US $6.5 million in Series A funding from two leading venture capital firms.
News from Samplify, Apr 9, 2007
The next generation of mobile phones, 3GPP LTE uses OFDM as the modulation technique and requires variable-length FFTs to construct the sub-carrier signals on the fly as required.
News from RF Engines, Apr 9, 2007
Denali's Databahn memory system solution helps ODM's developers rapidly deploy mobile DDR memory systems in their chip for use in portable products.
News from Denali Software, Apr 9, 2007
Faraday Technology Corp has implemented the ARM926EJ-S hard core in UMC's 0.13um process.
News from Faraday Technology, Apr 3, 2007
Showing 301-325 of 1567 articles
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LSI adds processor core and memory blocks to range
LSI has announced the addition of the multicore-capable PowerPC 476 microprocessor core and high-speed, embedded DRAM memory blocks to its portfolio of custom silicon intellectual property (IP).
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