Intellectual Property Cores
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Latest articles from 'Intellectual Property Cores'
News releases from this sub-category
Showing 151-175 of 1567 articles
High-density SRAM-1T memory IP enables integration of up to three times more memory than a standard 6T-SRAM, enabling chips to incorporate more system memory on-chip.
News from Synopsys, Mar 7, 2008
The Aspex Compression Engine supports all of the most popular video compression algorithms, including MPEG-2, AVC/H.264, VC-1 and MJPEG.
News from Aspex Semiconductor, Mar 5, 2008
Easily configurable processor technology plays a key role in delivering the feature rich WiMedia protocol at low power and cost.
News from Tensilica, Mar 5, 2008
Graphics IP puts location SoC in the picture
The SiRFprima PND platform delivers advanced hardware-accelerated 3D graphics and video encoding and decoding engines using Imagination's PowerVR MBX 3D graphics accelerator core.
News from Imagination Technologies, Mar 4, 2008
Using Tensilica allowed the Smart Memory team to focus on creating a flexible memory system that supports many different memory models
News from Tensilica, Feb 29, 2008
SLE's Interlaken IP Core was built to work with off the shelf serdes from most technology vendors.
News from Silicon Logic Engineering, Feb 28, 2008
HDMI IP portfolio includes a PHY and digital controller for both transmit and receive applications.
News from MIPS Technologies, Feb 22, 2008
Support allows developers to rapidly implement control systems in a design flow that builds on Lattice's open source embedded solutions approach.
News from Lattice Semiconductor UK, Feb 21, 2008
LDPC platform IP powers a family of fully standard and proprietary LDPC solutions such as WiMAX mobile, Wi-Fi-11n, DVB-S2/T2, DTMB and powerline communication.
News from R-Interface, Feb 21, 2008
Users of the Synplicity's HAPS ASIC prototyping system can readily download and synthesise a large set of very advanced and mature IP cores from the GRLIB IP core library.
News from Gaisler Research, Feb 18, 2008
Samsung will use the Diamond Standard 330HiFi audio DSP in mobile handset and other designs.
News from Tensilica, Feb 15, 2008
The MM2000 supports any existing and future video codec with a simple firmware upgrade to existing silicon.
News from Ceva, Feb 11, 2008
Silicon Hive will enhance its HiveFlex ISP 2200 processor's instruction set for Apical Imaging's engines, resulting in area and power-efficient silicon designs.
News from Silicon Hive, Feb 11, 2008
The DesignWare USB LPM IP digital controller and PHY IP implement a new power sleep state to reduce power consumption.
News from Synopsys, Feb 5, 2008
Faraday Technology's UMC 65nm LL allows users to generate memory options including words, bits and aspect ratios, while retaining the desired area, performance and power specification.
News from Faraday Technology, Feb 1, 2008
Implementing OpenVG using hardware acceleration enables OEMs to deliver smooth, high frame rate interactive performance at very low power levels.
News from Imagination Technologies, Jan 31, 2008
The integration of the DesignWare DDR Protocol Controller IP and the Arteris NoC solution provide designers with memory traffic bandwidth and quality of service.
News from Synopsys, Jan 31, 2008
New venture will market intellectual property from world leading universities and research institutes to the communications industry.
News from Camitri Technologies, Jan 30, 2008
Software developers can choose between the cost-effective Avnet LX60 board and the high-capacity Avnet LX200 board to speed their software design, debug and program optimisation processes.
News from Tensilica, Jan 23, 2008
LSI has donated a replica of the first transistor to the Computer History Museum in Mountain View, California.
News from LSI Europe, Jan 22, 2008
Xilinx' 10/100 Ethernet MAC Lite and IIC interface IP cores can now be licensed at no additional charge.
News from Xilinx, Jan 16, 2008
The Cadence Start-up Accelerator programme will enable Analogies to focus on developing its high-speed PHY IP cores.
News from Cadence Design Systems, Jan 14, 2008
UpZide's solution builds on the existing and continued roll out of FTTN (fibre-to-the-network) VDSL2 deployment by significantly increasing both data rates and reach over the existing copper network.
News from Tensilica, Jan 11, 2008
Denali Software's PureSpec verification IP has helped Staccato Communications find critical bugs in its RTL as well as several bugs in its vendor-supplied RTL IP.
News from Denali Software, Jan 10, 2008
ARM Cortex-M3 core can be used in high-performance, low power consumption, minimum pin count ASICs, ASSPs and other system on chip solutions.
News from Toshiba Electronics Europe, Jan 9, 2008
Showing 151-175 of 1567 articles
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LSI adds processor core and memory blocks to range
LSI has announced the addition of the multicore-capable PowerPC 476 microprocessor core and high-speed, embedded DRAM memory blocks to its portfolio of custom silicon intellectual property (IP).
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